Job Description

Our client is looking for an experienced Digital IC Verification Manager to lead verification efforts across block-level and system-level design projects. This role will drive UVM-based verification strategy, ensure high-quality IP and SoC validation, and lead a team of verification engineers in delivering robust, production-ready silicon. 

Key Responsibilities

• Lead the development of UVM-based testbenches for block-level and system-level verification
• Define and own verification plans aligned with design specifications and functional requirements
• Implement constrained-random, directed, and coverage-driven verification strategies
• Analyze functional and code coverage metrics, identify gaps, and drive coverage closure
• Integrate and verify third-party IPs and interface protocols (e.g., RISC-V, AMBA, ISP, MIPI, etc.)
• Mentor and guide junior engineers in UVM methodology and verification best practices
• Collaborate with design and architecture teams on spec reviews, verification reviews, and debugging activities
• Drive continuous improvement in verification processes, tools, and methodologies

Requirements 

• 8+ years of experience in digital verification / IC verification / related digital design roles
• Bachelor’s degree or higher in Electrical Engineering, Computer Engineering, or related field
• Strong expertise in UVM-based verification environments (SystemVerilog/UVM)
• Proven experience in team leadership (3+ years managing R&D teams OR 5+ years project leadership)
• Fluent in Mandarin and English (written and spoken)
• Familiarity with interfaces such as USIT / CHPI / CMPI / iSP
• Experience in display driver IC products or similar semiconductor domains
• Exposure to or hands-on experience with AI-assisted engineering tools or workflows

For more information or confidential consultation, please do not hesitate to contact Athirah at athirah@bell-ward.com

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