Responsibilities

• Integrate and implement ARM-based CPU solutions using ARM CSS, including A78AE, A720AE, and Neoverse platforms within SoC designs.
• Contribute to system architecture and microarchitecture development, and prepare comprehensive design specifications and technical documentation.
• Execute module-level synthesis, timing analysis, formal verification, and low-power design implementation to ensure design quality and performance targets are met.
• Collaborate with verification teams on functional validation, coverage analysis, debugging, and issue resolution.
• Support FPGA prototyping, silicon validation, chip bring-up, debugging activities, as well as backend implementation and DFT integration efforts.
• Work closely with external design service providers to manage RTL deliverables, resolve design-related queries, and support system integration activities.

Requirements

• Bachelor's degree or higher in Microelectronics, Electrical/Electronic Engineering, or a related field, with a minimum of 2 years of SoC digital design experience.
• Strong proficiency in Verilog and solid understanding of AMBA protocols, including AXI, AHB, and APB.
• Good knowledge of digital IC design flows, including synthesis, static timing analysis (STA), and formal verification, with exposure to low-power design techniques and methodologies.
• Strong debugging and problem-solving skills, with hands-on experience using industry-standard EDA tools such as VCS, Design Compiler (DC), and PrimeTime. Experience with AI-assisted design tools is a plus.
• Experience with ARM-based SoC integration is preferred, including ARM CSS platforms, A78AE, A720AE, Neoverse CPUs, and CMN interconnect architectures.
• Proven experience collaborating with external design service providers on RTL handoff, design reviews, technical clarifications, and integration support activities.