About the Role

We are seeking an experienced Circuit Design Engineer specialising in clocking circuits to develop high-speed interfaces and mixed-signal designs using advanced CMOS technologies. The role involves circuit architecture, design simulations, physical implementation, and silicon evaluation.

Key Responsibilities

• Design and develop clocking circuits, including PLLs, DLLs, FLLs, delay lines, phase interpolators, duty cycle correction (DCC), and clock management units.

• Perform circuit architecture studies, design simulations, and floor planning.

• Collaborate with layout and mask design teams to support physical implementation.

• Conduct reliability verification and support silicon bring-up and evaluation.

• Contribute to the development of circuits for serial and parallel interfaces.

Key Requirements

• Bachelor's or postgraduate degree in Electrical and Electronic Engineering or a related field.

• 5–10 years of experience in clocking circuit design.

• Proficiency in FinFET technologies, transistor-level circuit design, and EDA tools.

• Strong experience with PLLs, DLLs, and other clock generation and management circuits.

• Understanding of serial and parallel interfaces and physical design processes.

• Strong teamwork and communication skills; architecture design experience is expected for senior-level responsibilities.