Job Description

About the Role

We are looking for an experienced Senior/Staff Package or Substrate Design Engineer to develop advanced IC packaging solutions, focusing on package layout, electrical performance, thermal management, and mechanical reliability.

Key Responsibilities

• Design and develop advanced IC packages and substrates, including 2.5D, 3D, and fan-out wafer-level packaging.

• Create package layouts using CAD tools such as Cadence Allegro Package Designer.

• Optimise designs for electrical performance, thermal dissipation, and mechanical reliability.

• Develop and maintain package design rules and guidelines.

• Collaborate with IC designers, SI/PI engineers, and project teams.

• Communicate design requirements and constraints to stakeholders.

• Coordinate with external vendors and suppliers.

Key Requirements

• Degree, Master's, or PhD in Electrical/Electronics Engineering, Materials Science, or a related field.

• 5–10 years of experience in package or substrate design.

• Experience with IC packaging technologies and substrate design.

• Proficiency in package design CAD tools, such as Cadence Allegro Package Designer.

• Knowledge of signal integrity, power integrity, thermal management, and mechanical reliability.

• Familiarity with advanced packaging technologies, including 2.5D and 3D packaging.

• Strong analytical, problem-solving, communication, and teamwork skills.