Job Description
About the Role
We are looking for an experienced Senior/Staff Package or Substrate Design Engineer to develop advanced IC packaging solutions, focusing on package layout, electrical performance, thermal management, and mechanical reliability.
Key Responsibilities
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Design and develop advanced IC packages and substrates, including 2.5D, 3D, and fan-out wafer-level packaging.
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Create package layouts using CAD tools such as Cadence Allegro Package Designer.
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Optimise designs for electrical performance, thermal dissipation, and mechanical reliability.
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Develop and maintain package design rules and guidelines.
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Collaborate with IC designers, SI/PI engineers, and project teams.
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Communicate design requirements and constraints to stakeholders.
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Coordinate with external vendors and suppliers.
Key Requirements
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Degree, Master's, or PhD in Electrical/Electronics Engineering, Materials Science, or a related field.
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5–10 years of experience in package or substrate design.
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Experience with IC packaging technologies and substrate design.
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Proficiency in package design CAD tools, such as Cadence Allegro Package Designer.
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Knowledge of signal integrity, power integrity, thermal management, and mechanical reliability.
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Familiarity with advanced packaging technologies, including 2.5D and 3D packaging.
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Strong analytical, problem-solving, communication, and teamwork skills.