Job Description

We are partnering with a leading player in the semiconductor industry to hire a Physical Design Engineer. This role offers the opportunity to work on advanced hardware development projects with exposure to global collaborations and cutting-edge technologies.

Key Responsibilities

• Perform logic synthesis
• Conduct timing design and verification
• Implement and verify DFT (Design for Test)
• Handle physical layout design (Place & Route)
• Execute power verification
• Carry out physical verification

Requirements

• 3–10 years of experience in LSI physical design
• Hands-on experience with industry-standard EDA tools (Synopsys, Cadence, Siemens EDA)
• Experience working on advanced nodes (7nm / 5nm / 3nm)
• Leadership or sub-lead experience
• Strong communication skills in multicultural environments

For more information or confidential consultation, please do not hesitate to contact Athirah at athirah@bell-ward.com

We thank you for applying with us in advance but only short-listed candidates will be notified.

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Company Registration No.: 1080098-P (JTK License No: JTKSM 427)